In digital data recorded in a non-return to zero inverted (NRZI) format, a "1" appears as a readback pulse with a single peak and a "0" as the absence of a pulse within a predetermined time interval ("bit cell" or "detection window"). In conventional peak detecting digital magnetic recording systems, in which a "1" is recorded as a transition in the magnetization state of a magnetic storage medium, written by switching the polarity of the electrical current energizing the write head, readback pulses alternate in polarity. In controlled polarity (CP) recording systems, successive readback pulses may have either the same or opposite polarity. The additional pulse polarity information is used to increase the information capacity of the recording channel.
CP recording is typically used with (d,k) run-length limited (RLL) codes, where d is a minimum run-length (i.e., the minimum number of "0"s between successive "1"s) and k is the maximum run-length (i.e., the maximum number of "0"s between successive "1"s). In CP recording, for run-lengths of d+1, d+3, etc., successive "1"s pulses have same-polarity. Moreover, in CP recording, for run-lengths of d, d+2, d+4, etc., successive "1"s pulses have opposite-polarity.
CP recording is described in: French, Catherine A., Wolf, Jack K. and Dixon, Glenn S. "Signalling With Special Run-Length Constraints for a Digital Recording Channel" IEEE Transactions on Magnetics, vol. 24, no. 3, May 1988, p. 2092-2097; French, Catherine A., Weathers, Anthony D. and Wolf, Jack K., "A Generalized Scheme for Generating and Detecting Recording Channel Output Waveforms with Controlled Pulse Polarity," IEEE Transactions on Magnetics, vol. 24, no. 6, November 1988, p. 25-30; and Weathers, Anthony D., French, Catherine A. and Wolf, Jack K., "Results on `Controlled Polarity` Modulation and Coding," IEEE Transactions on Magnetics, vol. 25, no. 5, September 1989, p. 4090-4092.
Prior art CP recording channels used simple low pass filters to reduce the noise in an enhanced peak detector. It was not known how to use pulse slimming equalizers in CP recording channels. Pulse slimming equalizers are required to achieve optimum recording density in peak detector channels, even thought magnetic recording channels using peak detectors have an effective signal-to-noise ratio (SNR) loss as a relative trade-off for a reduction in intersymbol interference peak shift. In the past, CP recording channels were unable to resolve same-polarity pulses corresponding to the d+1 run-length. Exclusion of the d+1 run-length from the modulation code limits channel recording capacity.
In prior CP run-length constraints, there were the minimum run-length of d plus an even number, greater than or equal to zero, of "0"s between transitions of opposite polarity and the minimum run-length of d plus an odd number, greater than or equal to three, of "0"s between transitions of same-polarity. In CP recording, detection window size for peak detection of a readback waveform is doubled, as compared to traditional binary schemes with equivalent packing density.
In standard m/n (d,k) RLL codes, m-data bits are mapped into n-code bits. The code rate, r, is equal to m/n. If T.sub.d is the data period, then the clock period of the code (code period), T.sub.c, is equal to m/n T.sub.d. Run-length constraints can be alternatively described as a minimum of d+1 and a maximum of k+1 code periods between written "1"s. The minimum time between transitions, T.sub.min, is equal to (d+1) T.sub.c. For a d+1 run-length, a time interval of (d+2) T.sub.c was previously unresolvable for same-polarity pulses. Thus, a minimum time between same polarity pulses, T.sub.0, was set to T.sub.min =(d+4) T.sub.c. In the past, available code patterns were reduced by this constraint. Also reduced were the potential code rate and recording density.
With RLL codes, a readback pulse peak detected anywhere within a detection window is assumed to have been written at the center of that window. RLL codes are used to make a code self-clocking by limiting the maximum run-length of "0"s. As is known, k cannot be too large for the RLL code to be self-clocking. Additionally, RLL codes are often used to increase T.sub.min to a value greater than T.sub.d.
In magnetic recording, write current charge is the integral of the normalized write current, i.sub.w. This integral is defined between some arbitrary starting time and the present, where time is normalized to T.sub.c. In which case, i.sub.w is equal to +/-1, where the sign of i.sub.w can alternate at each transition. To limit accumulated charge, d.c.-free RLL modulation codes are sometimes used, wherein the maximum accumulated charge, c, is constrained. Such codes are called charge-constrained RLL (CCRLL) codes.
The maximum capacity of accumulated charge of CCRLL codes can be calculated, and capacity loss for a given charge constraint for conventional (d,k) RLL recording can also be determined. For CCRLL codes, the maximum theoretical code rate, and thus channel capacity, is a function of d, k and c. References describing channel capacity of CCRLL codes include: Norris, Kermit and Bloomberg, Dan S., "Channel Capacity of Charge-Constrained Run-Length Limited Codes," IEEE Transactions on Magnetics, vol. MAG-17, no. 6, November 1981, p. 3452-3455; Marcus, B. H., Siegel, P. H. and Wolf, J. K., "Finite-State Modulation Codes for Data Storage," IEEE Journal on Selected Areas in Communications, vol. 10, no. 1, January 1992, p. 5; and the above-mentioned article entitled "Signalling with Special Run-Length Constraints for a Digital Recording Channel." In practice, actual codes are designed to have code rates as close as possible to the recording channel capacity without excessive hardware complexity. CCRLL codes are typically used in magnetic recording systems with rotary transformers, which cannot pass d.c. in the write current.
In enhancing performance of certain peak detection channels, techniques for pulse slimming a write current are often employed. One technique, write equalization, adds short wavelength pulses to a write current to effect pulse slimming. These added short wavelength pulses are not resolved during readback. Write equalization is described in: Schneider, Richard C., "Write Equalization in High-Linear-Density Magnetic Recording," IBM Journal of Research and Development, vol. 29, no. 6, November 1985, p. 563-568; Schneider, Richard C., "Write Equalization for Generalized (d,k) Codes," IEEE Transactions on Magnetics, vol. 24, no. 6, November 1988, p. 2533-2535; Koren, Norman L., "Signal Processing in Recording Channels Utilizing Unshielded Magnetoresistive Heads," IEEE Transactions on Magnetics, vol. 26, no. 5, September 1990, p. 2166-2168; and Koren, Norman L. "Matched Filter Limits and Code Performance in Digital Magnetic Recording," IEEE Transactions on Magnetics, vol. 27, no. 6, November 1991, p. 4596-4599.
In write equalized systems with times normalized to the clock period of the code, T.sub.c, pulses of length W are added to the write current starting at the Pth "0" following a "1", where P is equal to d+1. The transition representing a "1" may be delayed by Q. The period of added pulses is R. In prior write equalization, there were 1/R added pulses per code period T.sub.c, and R was limited to values of 1/N, where N is an integer greater than or equal to 1. In prior write equalized systems, 1/R is an integer which is typically fixed at 1 (i.e., R=1) to avoid unnecessarily high write frequencies, and there is at least one added pulse per code "0". In such systems, the pulse length W of the added pulses, as well as the period R, are bounded by the equation 0.ltoreq.W/R.ltoreq.0.5. For the RLL codes to be d.c.-free, W/R must equal 0.5.
In the prior non-CP write equalization, write equalization is a linear process having a transfer function of: ##EQU1## Where G.sub.wreq (.omega.) is the transfer function in the frequency domain; T.sub.c is the clock period of the code; P is equal to d+1; and where added pulse length W, delay Q and added pulse period R are normalized to values of T.sub.c.
A read equalizer transfer function is expressed mathematically as a ratio of two polynomials in the complex (S) plane, where roots of the polynomial numerator are known as "zeros" and roots of the polynomial denominator are known as "poles". Read equalizers represented by poles and zeros can be realized as RLC (resistive-inductive-capacitive) networks by using techniques of circuit synthesis theory. These techniques are well-known in the art of the present invention. Such techniques are described in Temes, Gabor C. and LaPatra, Jack W., "Circuit Synthesis and Design," McGraw-Hill, 1977. Moreover, equalizer chips are now available that allow pole and zero values to be programmed. An example of such a chip is the IMP4250 Programmable Continuous-time Filter available from International Microelectronic Products of San Jose, Calif., in which up to six poles and six zeros can be programmed.
Linearity implies that a data pattern can be simulated by linearly superimposing isolated pulses comprising the NRZI . . . 0001000 . . . data pattern. These pulses normally have alternating polarity.
In the past, a read equalizer for resolving d+1 run-length, same-polarity code patterns during readback did not exist in CP systems. Moreover, in the past, CP recording was not understood to be a case of write equalization with a linear transfer function. It is desirable, therefore, to provide an equalized recording channel for CP which includes readback equalization to resolve d+1 run-length, same-polarity code patterns.